Analytic Design of on-Chip Spiral Inductor with Variable Line Width

On-chip spiral inductors with variable line width layouts are known for their high quality factor (Q-factor). In this paper, we present an analytical approach to facilitate the design of such inductors. Based on analysis ohmic and eddy-current losses, first derive formula metal resistance calculation a inductor. By minimizing resistance, simple equation finding proper each coil is then presented. Several 0.18 ?m CMOS investigated, via electromagnetic simulations experimental studies, test proposed calculation, as well method. It found that developed can effectively model metal-line Moreover, inductor obtained using method significantly improve Q-factor little compromise inductance, which validates capacity technique. Since be carried out calculations, it may more efficient than those previously reported in literature.